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rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a AD8631/ad8632 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 2000 1.8 v, 5 mhz rail-to-rail low power operational amplifiers pin configurations 5-lead sot-23 (rt suffix) 1 2 3 5 4 Cin a +in a v+ out a AD8631 vC 8-lead soic (r suffix) out a C in a +in a v C v+ out b C in b +in b ad8632 18 27 36 45 8-lead soic (rm suffix) C in a +in a v C out b C in b +in b v+ 1 4 5 8 ad8632 out a features single supply operation: 1.8 v to 6 v space-saving sot-23, soic packaging wide bandwidth: 5 mhz @ 5 v, 4 mhz @ 1.8 v low offset voltage: 4 mv max, 0.8 mv typ rail-to-rail input and output swing 2 v/ s slew rate @ 1.8 v only 225 a supply current @ 1.8 v applications portable communications portable phones sensor interface active filters pcmcia cards asic input drivers wearable computers battery-powered devices new generation phones personal digital assistants general description the AD8631 brings precision and bandwidth to the sot-23-5 package at single supply voltages as low as 1.8 v and low supply current. the small package makes it possible to place the AD8631 next to sensors, reducing external noise pickup. the AD8631 and ad8632 are rail-to-rail input and output bipolar amplifiers with a gain bandwidth of 4 mhz and typical voltage offset of 0.8 mv from a 1.8 v supply. the low supply current and the low supply voltage makes these parts ideal for battery-powered applications. the 3 v/ s slew rate makes the AD8631/ad8632 a good match for driving asic inputs, such as voice codecs. the AD8631/ad8632 is specified over the extended industrial (?0 c to +125 c) temperature range. the AD8631 single is available in 5-lead sot-23 surface-mount packages. the dual ad8632 is available in 8-lead soic and soic packages.
? rev. 0 AD8631/ad8632?pecifications electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage v os 0.8 4.0 mv ?0 c t a +125 c6mv input bias current i b 250 na ?0 c t a +125 c 500 na input offset current i os 150 na ?0 c t a +125 c 550 na input voltage range v cm 05v common-mode rejection ratio cmrr 0 v v cm 5 v, 63 70 db ?0 c t a +125 c56 db large signal voltage gain a vo r l = 10 k ? , 0.5 v < v out < 4.5 v 25 v/mv r l = 100 k ? , 0.5 v < v out < 4.5 v 100 400 v/mv r l = 100 k ? , ?0 c t a +125 c 100 v/mv offset voltage drift ? v os / ? t 3.5 v/ c bias current drift ? i b / ? t 400 pa/ c output characteristics output voltage swing high v oh i l = 100 a ?0 c t a +125 c 4.965 v i l = 1 ma 4.7 v output voltage swing low v ol i l = 100 a ?0 c t a +125 c35mv i l = 1 ma 200 mv short circuit current i sc short to ground, instantaneous 10 ma power supply power supply rejection ratio psrr v s = 2.2 v to 6 v, 75 90 db ?0 c t a +125 c72 db supply current/amplifier i sy v out = 2.5 v 300 450 a ?0 c t a +125 c 650 a dynamic performance slew rate sr 1 v < v out < 4 v, r l = 10 k ? 3v/ s gain bandwidth product gbp 5 mhz settling time t s 0.1% 860 ns phase margin m 53 degrees noise performance voltage noise e n p-p 0.1 hz to 10 hz 0.8 v p-p voltage noise density e n f = 1 khz 23 nv/ hz current noise density i n f = 1 khz 1.7 pa/ hz specifications subject to change without notice. (v s = 5 v, v?= 0 v, v cm = 2.5 v, t a = 25 c unless otherwise noted)
? rev. 0 AD8631/ad8632 electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage v os 0.8 4.0 mv ?0 c t a +125 c6mv input bias current i b 250 na input offset current i os 150 na input voltage range v cm 0 2.2 v common-mode rejection ratio cmrr 0 v v cm 2.2 v, 54 70 db ?0 c t a +125 c47 db large signal voltage gain a vo r l = 10 k ? , 0.5 v < v out < 1.7 v 25 v/mv r l = 100 k ? 50 200 v/mv output characteristics output voltage swing high v oh i l = 100 a 2.165 v i l = 750 a 1.9 v output voltage swing low v ol i l = 100 a35mv i l = 750 a 200 mv power supply supply current/amplifier i sy v out = 1.1 v 250 350 a ?0 c t a +125 c 500 a dynamic performance slew rate sr r l = 10 k ? 2.5 v/ s gain bandwidth product gbp 4.3 mhz phase margin m 50 degrees noise performance voltage noise density e n f = 1 khz 23 nv/ hz current noise density i n f = 1 khz 1.7 pa/ hz specifications subject to change without notice. (v s = 2.2 v, v?= 0 v, v cm = 1.1 v, t a = 25 c unless otherwise noted)
? rev. 0 AD8631/ad8632?pecifications electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage v os 0.8 4.0 mv 0 c t a 125 c6mv input bias current i b 250 na input offset current i os 150 na input voltage range v cm 0 1.8 v common-mode rejection ratio cmrr 0 v v cm 1.8 v, 0 c t a 125 c4965db large signal voltage gain a vo r l = 10 k ? , 0.5 v < v out < 1.3 v 20 v/mv r l = 100 k ? , 0.5 v < v out < 1.3 v 40 200 v/mv output characteristics output voltage swing high v oh i l = 100 a 1.765 v i l = 750 a 1.5 v output voltage swing low v ol i l = 100 a35mv i l = 750 a 200 mv power supply power supply rejection ratio psrr v s = 1.7 v to 2.2 v, 68 86 db 0 c t a 125 c65 db supply current/amplifier i sy v out = 0.9 v 225 325 a 0 c t a 125 c 450 a dynamic performance slew rate sr r l = 10 k ? 2v/ s gain bandwidth product gbp 4 mhz phase margin m 49 degrees noise performance voltage noise density e n f = 1 khz 23 nv/ hz current noise density i n f = 1 khz 1.7 pa/ hz specifications subject to change without notice. (v s = 1.8 v, v?= 0 v, v cm = 0.9 v, t a = 25 c unless otherwise noted)
AD8631/ad8632 ? rev. 0 absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 v input voltage 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd to v s differential input voltage . . . . . . . . . . . . . . . . . . . . . . 0.6 v internal power dissipation sot-23 (rt) . . . . . . . . . . . . see thermal resistance chart soic (r) . . . . . . . . . . . . . . . see thermal resistance chart soic (rm) . . . . . . . . . . . . see thermal resistance chart output short-circuit duration . . . . . . . . . . . . . . . . indefinite storage temperature range r, rm, and rt packages . . . . . . . . . . . . . ?5 c to +150 c operating temperature range AD8631, ad8632 . . . . . . . . . . . . . . . . . . ?0 c to +125 c junction temperature range r, rm, and rt packages . . . . . . . . . . . . . ?5 c to +150 c lead temperature range (soldering, 60 sec) . . . . . . . . 300 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating condi- tions for extended periods may affect device reliability. 2 for supply voltages less than 6 v the input voltage is limited to the supply voltage. package type ja 1 jc unit 5-lead sot-23 (rt) 230 146 c/w 8-lead soic (r) 158 43 c/w 8-lead soic (rm) 210 45 c/w note 1 ja is specified for worst-case conditions, i.e., ja is specified for device soldered in circuit board for sot-23 and soic packages. input offset voltage C mv 120 0 C 4 quantity of amplifiers 90 60 30 C 3 C 2 C 101234 v s = 5v v cm = 2.5v t a = 25 c count = 1,133 op amps figure 1. input offset voltage distribution supply voltage C v 350 200 6 supply current C a 1 345 325 300 275 250 225 2 t a = 25 c figure 2. supply current per amplifier vs. supply voltage caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the AD8631/ad8632 features proprietary esd protection circuitry, permanent dam- age may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device ordering guide temperature package package model range description option brand AD8631art 1 ?0 c to +125 c 5-lead sot-23 rt-5 aea ad8632ar ?0 c to +125 c 8-lead soic so-8 ad8632arm 2 ?0 c to +125 c 8-lead soic rm-8 aga notes 1 available in 3,000-piece reels only. 2 available in 2,500-piece reels only.
AD8631/ad8632 ? rev. 0 typical characteristics temperature C c 500 200 125 supply current C a 50 25 50 100 450 400 350 300 250 v s = 5v 25 075 figure 3. supply current per amplifier vs. temperature common-mode voltage C v 150 150 100 50 0 50 100 3 3 2 input bias current C na 1 0 12 v s = 2.5v t a = 25 c figure 4. input bias current vs. common-mode voltage source load current C a 140 120 0 10 10k 100 output voltage C mv 1k 100 80 60 40 20 t a = 25 c figure 5. output voltage to supply rail vs. load current frequency C hz 100k 100m 1m open-loop gain C db 10m 40 40 30 20 10 0 10 20 30 45 0 45 90 90 phase shift C de g rees v s = 5v t a = 25 c gain phase figure 6. open-loop gain vs. frequency frequency C hz 10 100m 1k closed-loop gain C db 1m 40 40 20 20 50 100 10k 100k 10m v s = 2.5v t a = 25 c 30 10 0 10 30 figure 7. closed-loop gain vs. frequency frequency C hz 10 1k cmrr C db 1m 100 20 40 60 80 0 100 10k 100k 10m v s = 2.5v t a = 25 c figure 8. cmrr vs. frequency
AD8631/ad8632 ? rev. 0 frequency C hz 10 1k psrr C db 1m 20 40 60 80 0 100 10k 100k 10m 120 psrr v s = 2.5v t a = 25 c psrr 100 figure 9. psrr vs. frequency v s = 5v v cm = 2.5v r l = 10k t a = 25 c v in = 50mv a v = +1 capacitance C pf 60 50 0 10 100 overshoot C % 30 20 10 40 os +os figure 10. overshoot vs. capacitance load frequency C hz 6 5 0 10k 1m 100k maximum output swing C v p-p 3 2 1 4 distortion 3% v s = 5v a v = +1 r l = 10k t a = 25 c c l = 15pf figure 11. output swing vs. frequency frequency C hz 10 100m 1k output impedance C 1m 0 60 40 100 10k 100k 10m v s = 5v t a = 25 c 10 20 30 50 a v = +10 a v = +1 figure 12. output impedance vs. frequency frequency C hz 50 0 10 10k 100 voltage noise density C pa/ hz 1k 40 30 20 10 v s =5v t a = 25 c figure 13. voltage noise density vs. frequency frequency C hz 5 0 10 10k 100 current noise density C pa/ hz 1k 4 3 2 1 v s = 5v t a = 25 c figure 14. current noise density vs. frequency
AD8631/ad8632 ? rev. 0 voltage C 200nv/div time C 1s/div 0 0 0 0 0 0 0 0 0 t a = 25 c v s = 2.5v figure 15. 0.1 hz to 10 hz noise time C 200 s/div 0 0 0 voltage C 1v/div 0 0 0 0 0 v s = 2.5v a v = 1 v in = sine wave t a = 25 c figure 16. no phase reversal time C 250ns/div 0 0 0 voltage C 20mv/div 0 0 0 0 0 v s = 2.5v a v = +1 t a = 25 c c l = 33pf r l = 10k figure 17. small signal transient response time C 500ns/div 0 0 0 voltage C 500mv/div 0 0 0 0 0 v s = 2.5v a v = +1 t a = 25 c c l = 100pf r l = 10k figure 18. large signal transient response theory of operation the ad863x is a rail-to-rail operational amplifier that can operate at supply voltages as low as 1.8 v. this family is fabricated using analog devices?high-speed complementary bipolar process, also called xfcb. the process trench isolates each transistor to mini- mize parasitic capacitance, thereby allowing high-speed perfor- mance. figure 19 shows a simplified schematic of the ad863x family. the input stage consists of two parallel complementary differen- tial pair: one npn pair (q1 and q2) and one pnp pair (q3 and q4). the voltage drops across r7, r8, r9, and r10 are kept low for rail-to-rail operation. the major gain stage of the op amp is a double-folded cascode consisting of transistors q5, q6, q8, and q9. the output stage, which also operates rail-to-rail, is driven by q14. the transistors q13 and q10 act as level-shifters to give more headroom during 1.8 v operation. as the voltage at the base of q13 increases, q18 starts to sink current. when the voltage at the base of q13 decreases i8 flows through d16 and q15 increasing the vbe of q17, then q20 sources current. the output stage also furnishes gain, which depends on the load resistance, since the output transistors are in common emitter configuration. the output swing when sinking or sourcing 100 a is 35 mv maximum from each rail. the input bias current characteristics depend on the common- mode voltage (see figure 4). as the input voltage reaches about 1 v below v cc , the pnp pair (q3 and q4) turns off. the 1 k ? input resistor r1 and r2, together with the diodes d7 and d8, protect the input pairs against avalanche damage. the ad863x family exhibits no phase reversal as the input signal exceeds the supply by more than 0.6 v. excessive current can flow through the input pins via the esd diodes d1-d2 or d3-d4, in the event their ~0.6 v thresholds are exceeded. such fault currents must be limited to 5 ma or less by the use of external series resistance(s). low voltage operation battery voltage discharge the AD8631 operates at supply voltages as low as 1.8 v. this amplifier is ideal for battery-powered applications since it can operate at the end of discharge voltage of most popular batteries. table i lists the nominal and end-of-discharge voltages of several typical batteries.
AD8631/ad8632 ? rev. 0 the rail-to-rail feature of the AD8631 can be observed over the supply voltage range, 1.8 v to 5 v. traces are shown offset for clarity. input bias consideration the input bias current (i b ) is a non-ideal, real-life parameter that affects all op amps. i b can generate a somewhat significant offset voltage. this offset voltage is created by i b when flowing through the negative feedback resistor r f . if i b is 250 na (worst case), and r f is 100 k ? , the corresponding generated offset voltage is 25 mv (v os = i b r f ). obviously the lower the r f the lower the generated voltage offset. using a compensation resistor, r b , as shown in figure 21, can minimize this effect. with the input bias current minimized we still need to be aware of the input offset current (i os ) which will generate a slight offset error. figure 21 shows three different configurations to minimize i b -induced offset errors. noninverting configuration AD8631 r s v i v out r f = r s unity gain buffer v out r f r i r b = r i r f v i v out r b = r i r f v i r f r i AD8631 inverting configuration AD8631 figure 21. input bias cancellation circuits q14 in v ee v cc v out q1 q3 r5 r6 i2 r1 in r2 r4 r3 i1 r7 r8 d2 esd d7 d8 q2 q4 d1 esd d3 esd d4 esd q5 q6 q7 c1 q8 q11 q9 i4 i3 i5 q13 i7 i6 c3 r10 r9 r11 q15 q17 d6 r12 q18 i8 c2 r14 q19 q20 c4 d9 v cc d16 r13 v ee q10 figure 19. simplified schematic table i. typical battery life voltage range nominal end-of-voltage battery voltage (v) discharge (v) lead-acid 2 1.8 lithium 2.6?.6 1.7?.4 nimh 1.2 1 nicd 1.2 1 carbon-zinc 1.5 1.1 rail-to-rail input and output the AD8631 features an extraordinary rail-to-rail input and output with supply voltages as low as 1.8 v. with the amplifier? supply set to 1.8 v, the input can be set to 1.8 v p-p, allowing the output to swing to both rails without clipping. figure 20 shows a scope picture of both input and output taken at unity gain, with a frequency of 1 khz, at v s = 1.8 v and v in = 1.8 v p-p. time C 200 s/div v s = 1.8v v in = 1.8v p-p v in v out figure 20. rail-to-rail input output
AD8631/ad8632 ?0 rev. 0 driving capacitive loads capacitive load vs. gain most amplifiers have difficulty driving capacitance due to degra- dation of phase margin caused by additional phase lag from the capacitive load. higher capacitance at the output can increase the amount of overshoot and ringing in the amplifier? step response and could even affect the stability of the device. the value of capacitive load that an amplifier can drive before oscillation varies with gain, supply voltage, input signal, temperature, among oth- ers. unity gain is the most challenging configuration for driving capacitive load. however, the AD8631 offers reasonably good capacitive driving ability. figure 22 shows the AD8631? ability to drive capacitive loads at different gains before instability occurs. this graph is good for all v sy . gain C v/v 1m 10 10 2 capacitive load C pf 468 10k 1k 100 9 357 1 unstable stable 100k figure 22. capacitive load vs. gain in-the-loop compensation technique for driving capacitive loads when driving capacitance in low gain configuration, the in-the-loop compensation technique is recommended to avoid oscillation as is illustrated in figure 23. r f + r g c f =1 + a cl 1 r f c l r o [ [ r x = r o r g r f where r o = open-loop output resistance AD8631 v in v out r x c l c f r f r g figure 23. in-the-loop compensation technique for driving capacitive loads snubber network compensation for driving capacitive loads as load capacitance increases, the overshoot and settling time will increase and the unity gain bandwidth of the device will decrease. figure 24 shows an example of the AD8631 in a non- inverting configuration driving a 10 k ? resistor and a 600 pf capacitor placed in parallel, with a square wave input set to a frequency of 90 khz and unity gain. voltage C 200mv/div time C 2 s/div 90khz input signal a v = 1 c = 600pf figure 24. driving capacitive loads without compensation by connecting a series r? from the output of the device to ground, known as the ?nubber?network, this ringing and over- shoot can be significantly reduced. figure 25 shows the network setup, and figure 26 shows the improvement of the output response with the ?nubber?network added. AD8631 v in v out 5v r x c x c l figure 25. snubber network compensation for capacitive loads voltage C 200mv/div time C 2 s/div 90khz input signal a v = 1 c = 600pf figure 26. photo of a square wave with the snubber network compensation the network operates in parallel with the load capacitor, c l , and provides compensation for the added phase lag. the actual values of the network resistor and capacitor have to be empirically determined. table ii shows some values of snubber network for large capacitance load.
AD8631/ad8632 ?1 rev. 0 table ii. snubber network values for large capacitive loads c load rx cx 600 pf 300 ? 1 nf 1 nf 300 ? 1 nf 10 nf 90 ? 8 nf total harmonic distortion + noise the ad863x family offers a low total harmonic distortion, which makes this amplifier ideal for audio applications. figure 27 shows a graph of thd + n, which is ~0.02% @ 1 khz, for a 1.8 v supply. at unity gain in an inverting configuration the value of the total harmonic distortion + noise stays consistently low over all volt- ages supply ranges. frequency C hz 0.1 0.001 10 20k thd + n C % 0.01 1 10 100 1k 10k v s = 1.8v v s = 5v inverting a v = 1 figure 27. thd + n vs. frequency graph ad8632 turn-on time the low voltage, low power ad8632 features an extraordinary turn on time. this is about 500 ns for v sy = 5 v, which is impressive considering the low supply current (300 a typical per amplifier). figure 28 shows a scope picture of the ad8632 with both channels configured as followers. channel a has an input signal of 2.5 v and channel b has the input signal at ground. the top waveform shows the supply voltage and the bottom waveform reflects the response of the amplifier at the output of channel a. time C 200ns/div 0 0 0 voltage C 1v/div 0 0 0 0 v s = 5v a v = 1 v in = 2.5v step 0v 0v figure 28. ad8632 turn-on time a micropower reference voltage generator many single-supply circuits are configured with the circuit biased to one-half of the supply voltage. in these cases, a false-ground reference can be created by using a voltage divider buffered by an amplifier. figure 28 shows the schematic for such a circuit. the two 1 m ? resistors generate the reference voltages while drawing only 0.9 a of current from a 1.8 v supply. a capacitor connected from the inverting terminal to the output of the op amp provides compensation to allow a bypass capacitor to be connected at the reference output. this bypass capacitor helps establish an ac ground for the reference output. AD8631 10k 0.022 f v ref 0.9v to 2.5v 1 f 1 f 1m 1.8v to 5v 100 1m figure 29. a micropower reference voltage generator microphone preamplifier the AD8631 is ideal to use as a microphone preamplifier. figure 30 shows this implementation. AD8631 v out r3 220k 1.8v v ref = 0.9v r2 22k c1 0.1 f 1.8v r1 2.2k electret mic a v = r3 r2 v in figure 30. a microphone preamplifier r1 is used to bias an electret microphone and c1 blocks dc voltage from the amplifier. the magnitude of the gain of the amplifier is approximately r3/r2 when r2 10 r1. v ref should be equal to 1/2 1.8 v for maximum voltage swing. direct access arrangement for telephone line interface figure 31 illustrates a 1.8 v transmit/receive telephone line interface for 600 ? transmission systems. it allows full duplex transmission of signals on a transformer-coupled 600 ? line in a differential manner. amplifier a1 provides gain that can be adjusted to meet the modem output drive requirements. both a1 and a2 are configured to apply the largest possible signal on a single supply to the transformer. amplifier a3 is configured as a difference amplifier for two reasons: (1) it prevents the transmit signal from interfering with the receive signal and (2) it extracts the receive signal from the transmission line for amplification by a4. a4? gain can be adjusted in the same manner as a1? to meet the modem? input signal requirements. standard resistor values permit the use of sip (single in-line package) format resistor arrays. couple this with the AD8631/
?2 rev. 0 printed in u.s.a. AD8631/ad8632 c3810?.5?/00 (rev. 0) ad8632? 5-lead sot-23, 8-lead soic, and 8-lead soic footprint and this circuit offers a compact solution. 6.2v 6.2v transmit txa receive rxa c1 0.1 f r1 10k r2 9.09k 2k p1 tx gain adjust a1 a2 a3 a4 a1, a2 = 1/2 ad8632 a3, a4 = 1/2 ad8632 r3 360 1:1 t1 to telephone line 1 2 3 7 6 5 2 3 1 6 5 7 10 f r7 10k r8 10k r5 10k r6 10k r9 10k r14 14.3k r10 10k r11 10k r12 10k r13 10k c2 0.1 f p2 rx gain adjust 2k z o 600 +1.8v dc midcom 671-8005 figure 31. a single-supply direct access arrangement for modems outline dimensions dimensions shown in inches and (mm). 8-lead narrow body soic (so-8) 0.1968 (5.00) 0.1890 (4.80) 85 4 1 0.2440 (6.20) 0.2284 (5.80) pin 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) 45 5-lead sot-23 (rt-5) 0.1181 (3.00) 0.1102 (2.80) pin 1 0.0669 (1.70) 0.0590 (1.50) 0.1181 (3.00) 0.1024 (2.60) 1 3 4 5 0.0748 (1.90) bsc 0.0374 (0.95) bsc 2 0.0079 (0.20) 0.0031 (0.08) 0.0217 (0.55) 0.0138 (0.35) 10 0 0.0197 (0.50) 0.0138 (0.35) 0.0059 (0.15) 0.0019 (0.05) 0.0512 (1.30) 0.0354 (0.90) seating plane 0.0571 (1.45) 0.0374 (0.95) 8-lead soic (rm-8) 85 4 1 0.122 (3.10) 0.114 (2.90) 0.199 (5.05) 0.187 (4.75) pin 1 0.0256 (0.65) bsc 0.122 (3.10) 0.114 (2.90) seating plane 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) 0.008 (0.20) 0.043 (1.09) 0.037 (0.94) 0.120 (3.05) 0.112 (2.84) 0.011 (0.28) 0.003 (0.08) 0.028 (0.71) 0.016 (0.41) 33 27 0.120 (3.05) 0.112 (2.84) spice model the spice model for the AD8631 amplifier is available and can be downloaded from the analog devices?web site at http://www.analog.com . the macro-model accurately simulates a number of AD8631 parameters, including offset voltage, input common-mode range, and rail-to-rail output swing. the output voltage versus output current characteristics of the macro-model is identical to the actual AD8631 performance, which is a critical feature with a rail-to-rail amplifier model. the model also accurately simulates many ac effects, such as gain-bandwidth product, phase margin, input voltage noise, cmrr and psrr versus frequency, and transient response. its high degree of model accuracy makes the AD8631 macro-model one of the most reliable and true-to-life models available for any amplifier.

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